Schemata of SMT-Problems
نویسندگان
چکیده
A logic is devised for reasoning about iterated schemata of SMT problems. The satis ability problem is shown to be undecidable for this logic, but we present a proof procedure that is sound, complete w.r.t. satis ability and terminating for a precisely characterized class of problems. It is parameterized by an external procedure (used as a black box) for testing the satis ability of ground instances of the schema in the considered theory (e.g. integers, reals etc.).
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